1. Field of the Invention
The present invention relates technology of converting design data of a system having identical modules, e.g., CPUs, operating in parallel.
2. Description of the Related Art
In conventional large-scale integration (LSI) design work, simulation is used to verify whether a circuit will operate as desired. In the execution of the simulation using software, the larger the scale of the circuit to be designed, the more time is required for the simulation. Hence, for a large-scale circuit to be designed, a simulation method of mounting the circuit on hardware, such as a field programmable gate array (FPGA), is often employed.
In recent systems that are the subject of design, a multiprocessor configuration for improving speed has become standard. Japanese Patent Application Laid-Open Publication Nos. H7-249012 and H8-030646 disclose conventional techniques for simulating operation of the configuration.
However, while simulation using an FPGA is faster than simulation by software, there is a limitation in the scale of the circuit to be simulated. Particularly, when simulating operation of a system to be designed with multiprocessor-configuration for faster results, a problem may arise in that the circuit becomes too large to be fully mounted on an FPGA due to the plural processor cores being integrated.
For example, in a system to be designed with a multiprocessor-configuration, plural identical CPUs operate communicating through a bus. Conventionally, when simulating a system to be designed made up of n CPUs, circuit volume increases by the number of CPUs. Thus, there has been a problem in that simulations of larger scale circuits to be designed must depend exclusively upon software, causing prolonged design periods.
On the other hand, this problem may be avoided for a large-scale circuit such as a system to be designed with multiprocessor-configuration by using pseudo processors having reduced circuit volumes for processors excluding the actual processor for which operation is to be verified.
However, there is a problem in that omissions might occur during simulation due to operational mismatch with the actual system to be designed, causing reduced design accuracy and consequently, the design period is prolonged as further man-hours are required for preparing pseudo processors.